\doxysubsubsection{Library\+\_\+configuration\+\_\+section }
\hypertarget{group___library__configuration__section}{}\label{group___library__configuration__section}\index{Library\_configuration\_section@{Library\_configuration\_section}}
\doxysubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\Hypertarget{group___library__configuration__section_ga3cee03fca286b4756b2df120eaeef227}\label{group___library__configuration__section_ga3cee03fca286b4756b2df120eaeef227} 
\#define {\bfseries STM32\+H7}
\begin{DoxyCompactList}\small\item\em STM32 Family. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___library__configuration__section_ga9dcd81b2da677d7f303b83ba33f57e2a}{\+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION\+\_\+\+MAIN}}~(0x01)
\begin{DoxyCompactList}\small\item\em Comment the line below if you will not use the peripherals drivers. In this case, these drivers will not be included and the application code will be based on direct access to peripherals registers. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___library__configuration__section_gad4a6490bdc16aa64290a0542580ef02b}{\+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION\+\_\+\+SUB1}}~(0x0A)
\item 
\#define \mbox{\hyperlink{group___library__configuration__section_gadad028b68a189b368971c6e231842e92}{\+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION\+\_\+\+SUB2}}~(0x06)
\item 
\#define \mbox{\hyperlink{group___library__configuration__section_ga3f5f6e59d2073234f27e8e3c6ece611f}{\+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION\+\_\+\+RC}}~(0x00)
\item 
\#define \mbox{\hyperlink{group___library__configuration__section_gaf7fafc316d385c32a72f569cd82b4dfd}{\+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION}}
\end{DoxyCompactItemize}


\doxysubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___library__configuration__section_doc-define-members}
\doxysubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___library__configuration__section_gaf7fafc316d385c32a72f569cd82b4dfd}\index{Library\_configuration\_section@{Library\_configuration\_section}!\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION}}
\index{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION}!Library\_configuration\_section@{Library\_configuration\_section}}
\doxysubsubsubsubsection{\texorpdfstring{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION}}
{\footnotesize\ttfamily \label{group___library__configuration__section_gaf7fafc316d385c32a72f569cd82b4dfd} 
\#define \+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\mbox{\hyperlink{group___library__configuration__section_ga9dcd81b2da677d7f303b83ba33f57e2a}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_MAIN}}\ \ \ \ \ <<\ 24)\(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |(\mbox{\hyperlink{group___library__configuration__section_gad4a6490bdc16aa64290a0542580ef02b}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB1}}\ <<\ 16)\(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |(\mbox{\hyperlink{group___library__configuration__section_gadad028b68a189b368971c6e231842e92}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB2}}\ <<\ 8\ )\(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ |(\mbox{\hyperlink{group___library__configuration__section_ga3f5f6e59d2073234f27e8e3c6ece611f}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_RC}}))}

\end{DoxyCode}
\Hypertarget{group___library__configuration__section_ga9dcd81b2da677d7f303b83ba33f57e2a}\index{Library\_configuration\_section@{Library\_configuration\_section}!\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_MAIN@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_MAIN}}
\index{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_MAIN@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_MAIN}!Library\_configuration\_section@{Library\_configuration\_section}}
\doxysubsubsubsubsection{\texorpdfstring{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_MAIN}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_MAIN}}
{\footnotesize\ttfamily \label{group___library__configuration__section_ga9dcd81b2da677d7f303b83ba33f57e2a} 
\#define \+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION\+\_\+\+MAIN~(0x01)}



Comment the line below if you will not use the peripherals drivers. In this case, these drivers will not be included and the application code will be based on direct access to peripherals registers. 

\texorpdfstring{$<$}{<} STM32\+H742\+VI, STM32\+H742\+ZI, STM32\+H742\+AI, STM32\+H742\+II, STM32\+H742\+BI, STM32\+H742\+XI Devices

\texorpdfstring{$<$}{<} STM32\+H743\+VI, STM32\+H743\+ZI, STM32\+H743\+AI, STM32\+H743\+II, STM32\+H743\+BI, STM32\+H743\+XI Devices

\texorpdfstring{$<$}{<} STM32\+H753\+VI, STM32\+H753\+ZI, STM32\+H753\+AI, STM32\+H753\+II, STM32\+H753\+BI, STM32\+H753\+XI Devices

\texorpdfstring{$<$}{<} STM32\+H750V, STM32\+H750I, STM32\+H750X Devices

\texorpdfstring{$<$}{<} STM32\+H747\+ZI, STM32\+H747\+AI, STM32\+H747\+II, STM32\+H747\+BI, STM32\+H747\+XI Devices

\texorpdfstring{$<$}{<} STM32\+H747\+AG, STM32\+H747\+IG, STM32\+H747\+BG, STM32\+H747\+XG

\texorpdfstring{$<$}{<} STM32\+H757\+ZI, STM32\+H757\+AI, STM32\+H757\+II, STM32\+H757\+BI, STM32\+H757\+XI Devices

\texorpdfstring{$<$}{<} STM32\+H745\+ZI, STM32\+H745\+II, STM32\+H745\+BI, STM32\+H745\+XI Devices

\texorpdfstring{$<$}{<} STM32\+H745\+ZG, STM32\+H745\+IG, STM32\+H745\+BG, STM32\+H745\+XG Devices

\texorpdfstring{$<$}{<} STM32\+H755\+ZI, STM32\+H755\+II, STM32\+H755\+BI, STM32\+H755\+XI Devices

\texorpdfstring{$<$}{<} STM32\+H7\+B0\+IBTx, STM32\+H7\+B0\+RBTx, STM32\+H7\+B0\+VBTx, STM32\+H7\+B0\+ZBTx Devices

\texorpdfstring{$<$}{<} STM32\+H7\+B0\+ABIxQ, STM32\+H7\+B0\+IBKxQ Devices

\texorpdfstring{$<$}{<} STM32\+H7\+A3\+IIK6, STM32\+H7\+A3\+IIT6, STM32\+H7\+A3\+NIH6, STM32\+H7\+A3\+RIT6, STM32\+H7\+A3\+VIH6, STM32\+H7\+A3\+VIT6, STM32\+H7\+A3\+ZIT6

\texorpdfstring{$<$}{<} STM32\+H7\+A3\+QIY6Q, STM32\+H7\+A3\+IIK6Q, STM32\+H7\+A3\+IIT6Q, STM32\+H7\+A3\+LIH6Q, STM32\+H7\+A3\+VIH6Q, STM32\+H7\+A3\+VIT6Q, STM32\+H7\+A3\+AII6Q, STM32\+H7\+A3\+ZIT6Q

\texorpdfstring{$<$}{<} STM32\+H7\+B3\+IIK6, STM32\+H7\+B3\+IIT6, STM32\+H7\+B3\+NIH6, STM32\+H7\+B3\+RIT6, STM32\+H7\+B3\+VIH6, STM32\+H7\+B3\+VIT6, STM32\+H7\+B3\+ZIT6

\texorpdfstring{$<$}{<} STM32\+H7\+B3\+QIY6Q, STM32\+H7\+B3\+IIK6Q, STM32\+H7\+B3\+IIT6Q, STM32\+H7\+B3\+LIH6Q, STM32\+H7\+B3\+VIH6Q, STM32\+H7\+B3\+VIT6Q, STM32\+H7\+B3\+AII6Q, STM32\+H7\+B3\+ZIT6Q

\texorpdfstring{$<$}{<} STM32\+H735\+AGI6, STM32\+H735\+IGK6, STM32\+H735\+RGV6, STM32\+H735\+VGT6, STM32\+H735\+VGY6, STM32\+H735\+ZGT6 Devices

\texorpdfstring{$<$}{<} STM32\+H733\+VGH6, STM32\+H733\+VGT6, STM32\+H733\+ZGI6, STM32\+H733\+ZGT6, Devices

\texorpdfstring{$<$}{<} STM32\+H730\+VBH6, STM32\+H730\+VBT6, STM32\+H730\+ZBT6, STM32\+H730\+ZBI6 Devices

\texorpdfstring{$<$}{<} STM32\+H730\+IBT6Q, STM32\+H730\+ABI6Q, STM32\+H730\+IBK6Q Devices

\texorpdfstring{$<$}{<} STM32\+H725\+AGI6, STM32\+H725\+IGK6, STM32\+H725\+IGT6, STM32\+H725\+RGV6, STM32\+H725\+VGT6, STM32\+H725\+VGY6, STM32\+H725\+ZGT6, STM32\+H725\+REV6, SM32\+H725\+VET6, STM32\+H725\+ZET6, STM32\+H725\+AEI6, STM32\+H725\+IET6, STM32\+H725\+IEK6 Devices

\texorpdfstring{$<$}{<} STM32\+H723\+VGH6, STM32\+H723\+VGT6, STM32\+H723\+ZGI6, STM32\+H723\+ZGT6, STM32\+H723\+VET6, STM32\+H723\+VEH6, STM32\+H723\+ZET6, STM32\+H723\+ZEI6 Devices

CMSIS Device version number V1.\+10.\+6 \mbox{[}31\+:24\mbox{]} main version \Hypertarget{group___library__configuration__section_ga3f5f6e59d2073234f27e8e3c6ece611f}\index{Library\_configuration\_section@{Library\_configuration\_section}!\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_RC@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_RC}}
\index{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_RC@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_RC}!Library\_configuration\_section@{Library\_configuration\_section}}
\doxysubsubsubsubsection{\texorpdfstring{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_RC}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_RC}}
{\footnotesize\ttfamily \label{group___library__configuration__section_ga3f5f6e59d2073234f27e8e3c6ece611f} 
\#define \+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION\+\_\+\+RC~(0x00)}

\mbox{[}7\+:0\mbox{]} release candidate \Hypertarget{group___library__configuration__section_gad4a6490bdc16aa64290a0542580ef02b}\index{Library\_configuration\_section@{Library\_configuration\_section}!\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB1@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB1}}
\index{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB1@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB1}!Library\_configuration\_section@{Library\_configuration\_section}}
\doxysubsubsubsubsection{\texorpdfstring{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB1}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB1}}
{\footnotesize\ttfamily \label{group___library__configuration__section_gad4a6490bdc16aa64290a0542580ef02b} 
\#define \+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION\+\_\+\+SUB1~(0x0A)}

\mbox{[}23\+:16\mbox{]} sub1 version \Hypertarget{group___library__configuration__section_gadad028b68a189b368971c6e231842e92}\index{Library\_configuration\_section@{Library\_configuration\_section}!\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB2@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB2}}
\index{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB2@{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB2}!Library\_configuration\_section@{Library\_configuration\_section}}
\doxysubsubsubsubsection{\texorpdfstring{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB2}{\_\_STM32H7xx\_CMSIS\_DEVICE\_VERSION\_SUB2}}
{\footnotesize\ttfamily \label{group___library__configuration__section_gadad028b68a189b368971c6e231842e92} 
\#define \+\_\+\+\_\+\+STM32\+H7xx\+\_\+\+CMSIS\+\_\+\+DEVICE\+\_\+\+VERSION\+\_\+\+SUB2~(0x06)}

\mbox{[}15\+:8\mbox{]} sub2 version 